An interrupt is said to be masked when it has been disabled or when the CPU has been instructed to ignore it. In this regard we have two classes of interrupts maskable and non-maskable interrupts.
Maskable Interrupt
A maskable interruptis a hardware interrupt that may be ignored by setting a bit in an interrupt mask register’s (IMR) bit-mask. Maskable interrupts are those which can be disabled or ignored by the microprocessor. The interrupts are either edge-triggered or level-triggered or level-triggered. Examples of maskable interrupts include RST6.5, RST7.5, RST5.5 of 8085 microprocessor.
What You Need To Know About Maskable Interrupt
- Maskable interrupt is a hardware Interrupt that can be disabled or ignored by the instructions of CPU.
- Maskable interrupts help to handle lower priority tasks.
- Can be masked or made pending
- It is possible to handle a maskable interrupt after executing the current instruction.
- May be vectored or non-vectored
- Response time is high
- Used to interface with peripheral device.
- Examples of maskable interrupts include RST6.5, RST7.5, RST5.5 of 8085 microprocessor
Non-Maskable Interrupt
Non-maskable interrupt (NMI) is a hardware interrupt that lacks an associated bit-mask, therefore it can never be ignored. It typically occurs to signal attention for non-recoverable hardware errors. A Non-maskable interrupt is often used when response time is critical or when an interrupt should never be disable during normal system operation. Such uses include reporting non-recoverable hardware errors, system debugging and profiling and handling of species cases like system resets. TRAP is an example of non-maskable interrupt; it consists of both level as well as edge triggering and is used in critical power failure conditions.
What You Need To Know About Non-Maskable Interrupt
- A non-maskable interrupt is a hardware interrupt that cannot be disabled or ignored by the instructions of CPU.
- Non-maskable interrupt help to handle higher priority tasks such as watchdog timer.
- Cannot be masked or made pending
- When a non-maskable interrupt occurs, the current instructions and status are stored in stack for the CPU to handle the interrupt.
- All are vectored interrupts
- Response time is low
- Used for emergency purpose e.g power failure, smoke detector etc
- Examples of non-maskable interrupt include RST1, RST2, RST3, RST4, RST5, RST6, RST7 and TRAP of 8085 microprocessor.
Also Read: Difference Between Software And Hardware Interrupt
Difference Between Maskable And Non-Maskable Interrupt
BASIS OF COMPARISON | MASKABLE INTERRUPT | NON-MASKABLE INTERRUPT |
Description | Maskable interrupt is a hardware Interrupt that can be disabled or ignored by the instructions of CPU. | A non-maskable interrupt is a hardware interrupt that cannot be disabled or ignored by the instructions of CPU. |
Function | Maskable interrupts help to handle lower priority tasks. | Non-maskable interrupt help to handle higher priority tasks such as watchdog timer. |
Operation | Can be masked or made pending | Cannot be masked or made pending |
Current Instructions | It is possible to handle a maskable interrupt after executing the current instruction. | When a non-maskable interrupt occurs, the current instructions and status are stored in stack for the CPU to handle the interrupt. |
Nature | May be vectored or non-vectored | All are vectored interrupts |
Response Time | Response time is high | Response time is low |
Use | Used to interface with peripheral device. | Used for emergency purpose e.g power failure, smoke detector etc |
Examples | Examples of maskable interrupts include RST6.5, RST7.5, RST5.5 of 8085 microprocessor | Examples of non-maskable interrupt include RST1, RST2, RST3, RST4, RST5, RST6, RST7 and TRAP of 8085 microprocessor. |
Also Read: Difference Between Vectored And Non-Vectored Interrupt
Comments are closed.